How it works
I2C is an open-drain bus — devices only pull the lines low. External pull-up resistors pull SDA and SCL back to VCC when released. The resistor value is constrained from two sides:
- Too low (too strong): The pull-up sources more current than the I2C output driver can sink while holding the line low. This violates the
V_OL_max= 0.4 V spec. - Too high (too weak): The RC rise time (pull-up resistor × bus capacitance) exceeds the I2C spec’s maximum rise time for the speed mode.
Minimum pull-up (from V_OL spec)
R_min = (VCC - V_OL_max) / I_OL_maxFor Standard and Fast mode: I_OL_max = 3 mA, V_OL_max = 0.4 V
At 3.3 V: R_min = (3.3 - 0.4) / 0.003 = 967 Ω → use 1 kΩ as minimum
At 5.0 V: R_min = (5.0 - 0.4) / 0.003 = 1533 Ω → use 1.5 kΩ as minimum
Fast+ mode (1 MHz) allows up to 20 mA sink current, so R_min drops to ~145 Ω at 3.3 V.
Maximum pull-up (from rise time spec)
t_rise = 0.8473 × R_p × C_b
R_max = t_rise_max / (0.8473 × C_b)| Speed | t_rise_max | At 100 pF |
|---|---|---|
| Standard (100 kHz) | 1000 ns | 11.8 kΩ |
| Fast (400 kHz) | 300 ns | 3.5 kΩ |
| Fast+ (1 MHz) | 120 ns | 1.4 kΩ |
Bus capacitance
Every trace, pin, and connector adds capacitance. The I2C spec limits total bus capacitance to 400 pF. Typical values:
- Short PCB trace (5 cm): ~5 pF
- Each device’s SDA/SCL pin: 5–15 pF
- 100 mm ribbon cable: ~10 pF
- Long twisted pair (1 m): ~50 pF
A board with 4 sensors and 10 cm of trace per line: roughly 4 × 10 pF + 10 pF trace = 50 pF. Use the slider to dial in your estimate.
Common mistakes
Using 4.7 kΩ everywhere. 4.7 kΩ works fine for 100 kHz Standard mode with low capacitance, but fails at 400 kHz Fast mode with typical bus capacitance (>70 pF gives a rise time > 280 ns, right at the limit). Measure your bus speed on a scope before trusting textbook values.
Ignoring integrated pull-ups. Many MCUs (STM32, nRF52, ESP32) have configurable internal pull-up resistors on I2C pins. They are typically 40–50 kΩ — far too weak for Fast or Fast+ mode. Disable them and use external resistors.
Multiple pull-ups in parallel. If you have a baseboard with 4.7 kΩ pull-ups and plug in a module with its own 10 kΩ pull-ups, you get 3.2 kΩ effective. At Fast mode with 200 pF bus capacitance, this may push rise time to ~340 ns — over spec. Check what your modules bring to the bus.
Level shifting without considering the pull-up side. When bridging 3.3 V and 5 V I2C buses with a bidirectional MOSFET level shifter, each side needs its own pull-up to the correct VCC. The pull-up value must be calculated for each side independently.